A high level modeling system (HLMS) is a software tool in which electronic designs can be described, simulated, and translated by machine into equivalent low-level electronic hardware. Often, this hardware is described in a hardware description language (HDL) such as VHDL or Verilog. An HLMS provides a higher level of abstraction for describing and simulating an electronic circuit than does an HDL simulation environment such as the ModelSim environment from the Model Technology Company. In an HLMS, the focus is on convenience, and the view is high-level and abstract. For example, signals in an HLMS are often real numbers, complex numbers, or elements of finite fields. In contrast, signals in HDL are usually bit vectors. It is essential that HLMS high-level abstractions faithfully reflect results produced in hardware. The Xilinx System Generator tool for DSP and Altera's DSP Builder are example HLMS's which have such capabilities.
Ordinarily in an HLMS, the components from which designs are built are high-level blocks made available by the HLMS itself. Often, however, it is also useful to allow components to be constructed by “importing” HDL from outside the HLMS. Ideally, imported components have all the capabilities that ordinary components do, such as the ability to connect to other components, participate in simulations, and translate into HDL.
There are several reasons why a designer might want to use imported components. For example, it may be far easier to import a component than to recreate the same capabilities using blocks supplied by the HLMS because components are often complicated and expensive to develop. Imported components may take advantage of hardware resources that are not otherwise available in the HLMS. Often a design developed in an HLMS is ultimately intended to be part of a larger design. Allowing components to be imported means more of the larger design can be simulated.
The process of translating an HLMS design into HDL is usually known as “netlisting”. Netlisting imported components may be simple, fast, and memory-efficient because nothing is required except to copy the HDL used to define the component. However, simulating imported components is more complicated. It is usually accomplished using a tool known as a co-simulation engine.
A variety of co-simulation engines are available. Some are implemented entirely in software, while others are implemented using a mixture of software and hardware. The particular engine selected depends on design objectives as well as the compatibility between the HLMS and the engine. For example, the ModelSim simulator and the NC-SIM simulator from Cadence can be used as software co-simulation engines in an HLMS environment. Similarly, the Wildcard development board from Annapolis Microsystems and the Benone development board from Nallatech can be used as hardware co-simulation engines. In software-based co-simulations the user may perform a behavioral simulation or perform simulation using a synthesized and mapped version of the design.
An HLMS may support netlisting and simulating a design. In netlisting, the HLMS automatically translates high-level blocks of the design into HDL code. With larger and faster devices being offered at lower prices, designs targeted to these devices are growing very large. Design activities are commonly partitioned between different work groups as designs grow ever larger. Translating and simulating a large design may take a very long time or require large amounts of computer memory. The high cost of translating a large design is often viewed as a disadvantage in using an HLMS. The present invention may address one or more of the above issues.